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 首頁 > 技術專區 > PCB>  Standard PCB Technology Roadmap
 
   
PCB
PCB HLC Technology
      Roadmap
 HDI Technology Roadmap
IC Substrate

     

    

PCB HLC Technology Roadmap

Products Roadmap/ Development Schedule 
 

Category Item Current Capability By 2024 H2 By 2025 H1 By 2025 H2
Structure   Max. Layer Count 28 32 32 32
Max. Sequential
Lamination
8+8 10+10 10+10 10+10
Max. Thickness 3.2 mm 3.6 mm 3.6 mm 3.8 mm
VIPPO(POFV) Min. plugging drilling hole size 175 µm 150 µm 150 µm 125 µm
Max. plugging A/R
(drilling size/ thickness)
12.2
(0.250/3.05 mm)
14.4
(0.228/3.25 mm)
14.4
(0.228/3.25 mm)
15.2
(0.25/3.8 mm)
Routing
Density 
Line Width/Space 1oz Cu 50/60 µm 45/50 µm 40/50 µm 40/50 µm
2oz Cu 115/115 µm 100/100 µm 100/100 µm 90/100 µm
Material High Tg, Low CTE, Low Dk/Df, Halogen Free
Surface Finish OSP, ENIG. Hard gold, selective Ni/Au, selective Hard gold, Imm.Tin, Imm.Silver, ENEPIG

網站更新日期: 2024/7/1