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 Home > Technology > PCB>  HDI Technology Roadmap
 
   
　
PCB
PCB HLC Technology
      Roadmap
 HDI Technology Roadmap
IC Substrate

　 　

    

 HDI Technology Roadmap 　
　 Products Roadmap/ Development Schedule 
 
　
Category Item Current Capability By 2024 H2 By 2025 H1 By 2025 H2
Structure Stagger Via 7+N+7 8+N+8 9+N+9 9+N+9
Stacked Via 7+N+7 8+N+8 9+N+9 9+N+9
All Stacked Via 16 Layers 18 Layers 20 Layers 20 Layers
Board Thickness Min. core thickness 50 µm 40 µm 40 µm 40 µm 
Max. prepreg thickness 30 µm
(1017 series)		 25 µm
(1010 series) 		25 µm
(1010 series)  		 25 µm
(1010 series)  
Line Width/Space 35/35 µm 25/25 µm 20/25 µm 20/20 µm
Routing
Density 		 Laser Via/Pad 70/130 µm 65/120 µm 65/110 µm 60/100 µm
Router Tolerance +/-50 µm +/-50 µm +/-50 µm +/-50 µm
Cavity Depth Tolerance Capability +/-75 µm +/-50 µm  +/-35 µm  +/-35 µm 
Material High Tg, Low CTE, Low Dk/Df, Halogen Free
Surface Finish OSP, ENIG. Hard gold, selective Ni/Au, selective Hard gold, Imm.Tin, Imm.Silver, ENEPIG

　
　
WEB Updated Date: 2024/3/28
 　

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