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 Home > Technology > PCB>  HDI Technology Roadmap
 
   
 
PCB
PCB HLC Technology
      Roadmap
 HDI Technology Roadmap
IC Substrate

   

    

HDI Technology Roadmap  
  Products Roadmap/ Development Schedule 
 
 
Category Item Current Capability By 2018 H1 By 2018 H2 By 2019 H1
Structure Stagger Via 5+N+5 6+N+6 6+N+6 7+N+7
Stacked Via 5+N+5 6+N+6 6+N+6 7+N+7
All Stacked Via 12 Layers 12 Layers 14 Layers 14 Layers
Routing
Density 
Line Width/Space 40/40 µm 40/40 µm 35/35 µm 35/35 µm
Laser Via/Pad 75/150 µm 65/115 µm 60/110 µm 60/100 µm
Router Tolerance +/-75 µm +/-50 µm +/-50 µm +/-45 µm
Material

High Tg, Low CTE, Low Dk/Df, Halogen Free

 
  Updated Date: 2017/8/1