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Home > Technology > IC Substrate> Flip Chip Substrate Technology Roadmap

	PCB

	IC Substrate
	Flip Chip Substrate Technology Roadmap Wire Bond Substrate Technology Roadmap

Flip Chip Substrate Technology Roadmap

Products Roadmap/ Development Schedule

Process		Item	Development schedule
			2011				2012
			Q1	Q2	Q3	Q4	Q1	Q2	Q3	Q4
Core substrate process	Core	Core thickness	0.2mm↑				0.2mm↑
	PTH drill	Through pitch	225(um)				175(um)
		Through diameter	100(um)				75(um)
	DES	Line / Spece	40/40(um)				35/35(um)
Build up process	Laser	Via / Pad	60/90(um)				55/80(um)
		Via registration	15(um)				12.5(um)
		Stack via	4 stacked vias				5 stacked vias
	DFR formation	Line / Spece	9/12(um)				8/8(um)
Solder resist process	SR	Thickness	21(um)				21(um)
		Tolerance	+/-7.5(um)				+/-5(um)
		Registration	+/-12.5(um)				+/-10(um)
		SRO	70(um)				65(um)
	Surface finish	Lead application	Immersion Tin HVM
			ENIG HVM
		Lead free application	Immersion Tin HVM
			ENEPIG HVM
			EOSP HVM
		LGA application	ENAG HVM
Back end process	C4 bump formation	Bump pitch	140(um)				130(um)
		Bump height (coin bump)	10~30(um)				10~30(um)
		Bump diameter (coin bump)	30~150(um)				30~150(um)
		Bump height (Round bump)	20~45 / 40~60(um)				20~45 / 40~60(um)
		New material	SAC305 HVM
			SnCu0.7 HVM
		New process	Paste printing HVM
			Micro-ball process HVM
			Plating bump
Structure	Layer count	Structure	6/N/6				7/N/7

Green Material Set

Category	Item	Current	2011				2012
			Q1	Q2	Q3	Q4	Q1	Q2	Q3	Q4
Material	Core	NPG gen. / Hitachi E679 gen. / R1515 gen.	Done
	Plugging ink	SP-08/SP-10	Done
	Dielectric	GX-13	Done
	SR	SR-7200G/AUS-703	Done
	ASF	I-Ag/I-Tin / ENIG / ENEPIG / HG	Done
	Bumping	SAC305 /SC07 / SA	Done
	DSC pre-soldering	SAC305 / SC07 / SA	Done

Update Date: 2011/12/27